Flexible Diplexer with Dynamically Configurable Band-Split in Hybrid Fiber Coax Deployments

ABSTRACT

A flexible diplexer may include a programmably reconfigurable filter pair capable of rendering a variety of band-split arrangements in a digital signal processor (DSP) backed design in hybrid fiber coaxial cable plant/system deployments. The flexible diplexers may thereby meet a larger range of band-split requirements, including the full range of band-split requirements. Configurability may be achieved by digitizing the signal at either input interface of a diplexer in a diplexer/amplifier complex after bandpass filtering, and two-to-four wire conversion at the respective forward (e.g. downstream) and reverse (e.g. upstream) input interfaces. A new band-split may be obtained by updating the digital filters using specified coefficient sets determined off-line and retrieved from memory. The flexible diplexer/amplifier complex may enable the implementation of additional functionality including equalization and tilt regeneration, self-interference cancellation, virtual segmentation, and/or creation of auxiliary service points to provide access to/from a small cell base station and/or Wi-Fi access point.

PRIORITY CLAIM

This application claims benefit of priority of Patent Application Ser.No. 63/020,094 titled “Flexible Diplexer with Dynamically ConfigurableBand-Split in Hybrid Fiber Coax Deployments”, filed on May 5, 2020,which is hereby incorporated by reference as though fully and completelyset forth herein.

FIELD OF THE INVENTION

The field of the invention generally relates to digital signalprocessing, and more specifically to a flexible diplexer that enables adynamically configurable band-split arrangement in hybrid fiber coaxdeployments.

DESCRIPTION OF THE RELATED ART

In the face of ever-increasing throughput demands, the cable industryhas made strides to increase accessible upstream and downstreambandwidths. Recent generations of the Data Over Cable Service InterfaceSpecification (DOCSIS) have evolved the transmission bandwidthallocation from predominantly downstream (DS) broadcast with a smallamount of spectrum set aside for upstream (US) transmission, referred toas sub-split band, to more equitable US vs. DS bandwidth allocations,referred to as mid-split band or high-split band depending on therelative portion of the total bandwidth allocated to US communications.FIG. 1 illustrates a sub-split transmission configuration wherebandwidth is set aside predominantly for DS communications, with a muchsmaller portion of the available bandwidth set aside for UScommunications. In example shown in FIG. 1, the US bandwidth is confinedto frequencies below ˜40 MHz. FIG. 2 illustrates a mid-split (top graph)and high-split (bottom graph) configuration with a more equitable splitbetween downstream and upstream bandwidth, with the upstream bandwidthconfined to frequencies below ˜85 MHz in the mid-split band, and below˜204 MHz in the high-split band.

Central to its ongoing evolution, DOCSIS has been pushing the upperfrequency limit of transmission bandwidth, moving from 1 GHz to 1218 MHz(i.e. 1.2 GHz), and continuing with operation beyond 1.2 GHz with anupper limit of 1794 MHz (i.e. 1.8 GHz), designated as Extended SpectrumDOCSIS (ESD). Standards operation out to 3 GHz and even 5 GHz arecurrently under consideration. Furthermore, multiple added band-splitarrangements are also being considered as part of the forthcoming DOCSIS4.0 PHY specification, as exemplified in Error! Reference source notfound.

TABLE 1 Proposed Band-Split Arrangements CableLabs/Intel OriginalCommScope Proposal guard guard guard guard guard guard start stop bandband stop band band stop band band (MHz) (MHz) (MHz) overhead (MHz)(MHz) overhead (MHz) (MHz) overhead 204 258  54 26.5% 258  54 26.5% 258 54 26.5% 300 370  70 23.3% 372  72 24.0% 378  78 26.0% 396 490  9423.7% 492  96 24.2% 498 102 25.8% 492 602 110 22.4% 606 114 23.2% 624132 26.8% 684 834 150 21.9% 834 150 21.9% 864 180 26.3%

Diplexer Design Considerations

A diplexer has historically been defined as a passive device thatimplements frequency-domain multiplexing (FDM). A diplexer has two ports(e.g., referred to as L and H) that are multiplexed onto a third port(e.g., referred to as S). The signals on ports L and H occupy disjointfrequency bands, and thus the signals on L and H can coexist on port Swithout interfering with each other. A conventional diplex filterarrangement requires a family of fixed analog filters to meet the rangeof band-split requirements under consideration. Each filter pair wouldimplement a single instance of the low-/high-pass response symmetricabout the center of the US/DS guard band. FIG. 3 illustrates thefrequency allocations in various diplex configurations as proposed inDOCSIS 4.0. As shown in FIG. 3, a negative power spectrum indicates a DSvs. US band designation.

The presence of five filter pairs in a diplexer would seem prohibitivelylarge, costly and require too much power for a single amplifier design.Full Duplex (FDX) designs may introduce further complications, requiringan asymmetric band-split to permit substantial overlap between US and DSband allocations, e.g., a 684 MHz US upper band limit coupled with a 258MHz DS lower band limit as depicted in Error! Reference source notfound.

Therefore, improvements in the field of diplexer design are desired.

SUMMARY OF THE EMBODIMENTS

Various embodiments are presented of a system and method for a flexiblediplexer that may include a (dynamically) reconfigurable filter paircapable of rendering a variety of band-split arrangements in a digitalsignal processor (DSP) backed design. As disclosed herein, variousembodiments of a flexible digital diplexer design may employ DSPtechniques to provide reconfigurable filter pairs, e.g. filter pairscapable of being configured, to programmably achieve a variety ofband-split arrangements. The flexible diplexers may thereby incorporateand meet a larger range of band-split requirements, possibly the fullrange of band-split requirements in a single, programmablyreconfigurable design. Configurability may be achieved by digitizing thesignal at RF (employing an RF analog-to-digital converter (ADC) ateither input interface of a diplexer in a diplexer/amplifier complex)after bandpass filtering and two-to-four wire conversion at therespective forward (e.g. downstream) and reverse (e.g. upstream) inputinterfaces. At any given time a new band-split may be obtained byupdating the respective digital low-pass filter and digital high-passfilter using specified coefficient sets, which may be determinedoff-line and retrieved from memory for the purposes of programming thedigital filters. The use of DSP also makes it possible to implementadditional functionality within the diplexer/amplifier complex toaccommodate various network deployment scenarios. Such functionalityincludes but is no limited to equalization and tilt regeneration atpoints along the cable segment for improved signal fidelity,self-interference cancellation to permit reduced guard bands between theupstream frequency band and downstream frequency band or band overlapbetween upstream and downstream in the case of full duplex, virtualsegmentation of the cable plant through the use of repeaters to create ahigh-speed transport between dedicated endpoints utilizing the frequencyrange above the designated upstream/downstream bands, and/or creation ofauxiliary service points to provide access to/from a small cell basestation and/or Wi-Fi access point or other backhaul network stations.

This Summary is intended to provide a brief overview of some of thesubject matter described in this document. Accordingly, it will beappreciated that the above-described features are merely examples andshould not be construed to narrow the scope or spirit of the subjectmatter described herein in any way. Other features, aspects, andadvantages of the subject matter described herein will become apparentfrom the following Detailed Description, Figures, and Claims.

BRIEF DESCRIPTION OF THE DRAWINGS

A better understanding of the present invention may be obtained when thefollowing detailed description of the preferred embodiment is consideredin conjunction with the following drawings, in which:

FIG. 1 illustrates a sub-split band configuration in a transmissioncable;

FIG. 2 illustrates mid-split band and high-split band configurations ina transmission cable;

FIG. 3 illustrates the frequency allocations for various diplexconfigurations;

FIG. 4 illustrates the frequency allocation for a full duplex diplexerarrangement;

FIG. 5 illustrates a cable system configuration that includes anamplifier in a cable node and also includes multiple additionalamplifiers;

FIG. 6 illustrates a cable system configuration that includes anamplifier in a cable node and does not include additional amplifiers;

FIG. 7 illustrates a conventional amplifier design with fixed, analogdiplexers;

FIG. 8 illustrates a flexible amplifier design with diplexers thatemploy digital signal processing, according to some embodiments;

FIG. 9 illustrates a flexible amplifier design with diplexers thatemploy digital signal processing and implement additional signalprocessing features, according to some embodiments;

FIG. 10 shows an exemplary signal diagram illustrating adjacent channelinterference (ACI) and adjacent leakage interference (ALI) scenarios;

FIG. 11 shows an exemplary system diagram illustrating potential DOCSISDS/US self-interference scenarios;

FIG. 12 shows an exemplary system diagram illustrating DS echo responseand analog echo cancellation;

FIG. 13 shows an exemplary circuit diagram illustrating flexiblediplexers implemented with active interference cancellation (ACI),according to some embodiments;

FIG. 14 illustrates an amplifier design with diplexers and spectrumallocation with virtual segmentation;

FIG. 15 illustrates one example of spectrum allocation with virtualsegmentation; and

FIG. 16 illustrates a cable system with multiple auxiliary serviceaccess points deployed along the cable strand.

While the invention is susceptible to various modifications andalternative forms, specific embodiments thereof are shown by way ofexample in the drawings and are herein described in detail. It should beunderstood, however, that the drawings and detailed description theretoare not intended to limit the invention to the particular formdisclosed, but on the contrary, the intention is to cover allmodifications, equivalents and alternatives falling within the spiritand scope of the present invention as defined by the appended claims.

DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION Acronyms

Various acronyms are used throughout the present disclosure. Definitionsof the most prominently used acronyms that may appear throughout thepresent disclosure are provided below:

-   ACI Adjacent Channel Interference-   ADC Analog to Digital Converter-   AIC Active Interference Cancellation-   ALI Adjacent Leakage Interference-   BW Bandwidth-   CATV Cable Television-   CE Channel Estimation-   CM Cable Modem-   CMTS Cable Modem Termination System-   CP Cyclic Prefix-   DAC Digital to Analog Converter-   DDC Digital Downconversion-   DMR Data Memory and Routing-   DOCSIS Data over Cable Service Interface Specification-   DS Downstream-   DSP Digital Signal Processor-   DUC Digital Upconversion-   EC Echo Cancellation-   ESD Extended Spectrum DOC SIS-   EQ Equalization-   FD Full Duplex-   FDD Frequency Division Duplexing-   FDX Full Duplex-   FFT Fast Fourier Transform-   FN Fiber Node-   FWD Forward-   HaaS Hardware as a Service-   HFC Hybrid Fiber-Coax-   IFFT Inverse Fast Fourier Transform-   MAC Medium Access Control-   MHz Mega-Hertz-   OFDM Orthogonal Frequency Division Multiplexing-   OLT Optical Line Terminator-   PE Processing Element-   PHY Physical Layer-   REV Reverse-   RM CP Remove Cyclic Prefix-   RP Repeater-   RPD Remote PHY Device-   RF Radio Frequency-   RS Reference Symbol-   RX Receive-   SC Subcarrier-   SDR Software Defined Ratio-   SDS Software Defined System-   SIC Self-Interference Cancellation-   TX Transmit-   US Upstream-   VS Virtual Segmentation

As will be further detailed below, various embodiments of a flexiblediplex arrangement may be able to meet a full range of bandrequirements, inclusive of those that may arise in future specificationreleases, e.g., reduced guard bands, additional band-splits, and/orfrequency extension out to 3 or 5 GHz and/or beyond.

Hybrid Fiber-Coaxial (HFC) Deployment Scenarios

A diplexer, i.e. diplex filter pair, may appear as an integral part ofeach amplifier found throughput the cable plant or cable system. Theoccurrence of amplifiers in a span, and consequently the total number ofamplifiers in a given cable plant or cable system is generally reflectedin the node configuration. For example, in a “Node+N” deployment,exemplified by deployments in rural and/or less densely populatedsuburban areas, N amplifiers may be included (or used) beyond that inthe cable node itself (exemplified as the Fiber node), as illustrated inFIG. 5. As seen in FIG. 5, the taps are represented by the squares, andthe drop span encompasses all of the drops from an amplifier, while asingle drop is indicated at tap 10 on the far right.

In contrast, in a “Node+0” deployment, exemplified by deployments indense urban areas and/or other deep fiber deployments, amplifiersoutside those present in the cable modems (CMs) and remotephysical-layer device (RPD; exemplified as the Fiber Node) areeliminated, as illustrated in FIG. 6. To date, full duplex (FDX)operation has been relegated to “Node+0” configurations, indicative of apassive plant (e.g., no active components at taps or along the cablespans between taps as well as those to/from RPD and drops to/from CMs).As seen in FIG. 6, various spans in the cable plant are indicated bycorrespondingly labeled lines with arrowheads. The various dashed linesindicate potential signal paths. The curved line under tap T₂ inparticular indicates a potential signal/interference path from one CM toanother.

Diplex Filter Arrangement

To overcome many of the limitations imposed by the use of traditionaldiplexers, a flexible diplexer may include a reconfigurable filter paircapable of rendering a variety of band-split arrangements in a digitalsignal processing (DSP) backed design. In other words, as disclosedherein, various embodiments of a diplexer design may employ DSPtechniques to provide reconfigurable filter pairs, e.g. filter pairscapable of being configured, to programmably achieve a variety ofband-split arrangements.

FIG. 7 illustrates a conventional amplifier design that employs fixed,analog, i.e. non-DSP backed, diplexers appearing at the forward, FWD,(or downstream, DS) and reverse, REV, (or upstream, US) I/O interfaces.A separate filter pair is needed for each proposed band-split, includingthe filter pair needed to accommodate a full-duplex configuration.

Flexible Diplexer Design

FIG. 8 illustrates an exemplary flexible diplexer according to someembodiments described herein, which may incorporate digital filters todefine a host of prescribed band-splits. In contrast to conventionalamplifier designs with analog diplexers, the flexible diplexers includea DSP backed design that may incorporate a larger range of band-splitrequirements, possibly the full range of band-split requirements in asingle, reconfigurable design. As seen in FIG. 8, design configurabilitymay be accomplished by digitizing the signal at RF (employing an RF ADCat either input interface) after bandpass filtering and two-to-four wireconversion at the respective FWD and REV input interfaces. The amplifiermay not need to include strict input or output interfaces as the US andDS signals may be combined at either interface. As referenced in thiscontext, input refers to the signal coupled in at the interface facingthe cable modem (CM) or Remote PHY Device (RPD). A prescribed band-splitmay be rendered according to the low-/high-pass filter characteristicslocated at the center of the signal processing complex, indicated by thehigh-pass filter in the top signal chain and the low-pass filter in thebottom signal chain. The signal may be input to the configurable diplexfilter via a respective ADC and output from the configurable diplexfilter via a respective RF DAC, with four-to-two wire conversions at therespective FWD and REV output interfaces.

Design Reconfiguration

Updating the respective low-pass filter and high-pass filter usingprescribed coefficient sets may effect (or institute) a new band-split.In some embodiments, the coefficients may be determined off-line (i.e.,not under direct control of the cable plant or cable system) and may beretrieved from memory, permitting the DSP to implement one of manyfilters from a common allotment of DSP resources. In other words,multiple filters may be implemented from a common software defined radio(SDR) hardware complex, including those needed to accommodate FDX asneeded. Configured appropriately, a field of DSP backed amplifiers maypermit the necessary band overlap to bring FDX to “Node+N” deployments.In an SDR implementation, design reconfiguration may be accomplisheddynamically throughout a node span as signaled from the Cable ModemTermination System (CMTS). Provided adequate DSP processing throughput,the upper band edge may be increased to extend bandwidth capability tohigher frequencies, e.g. to the 3 GHz or 5 GHz upper band edge.

Dynamic System Configuration

DSP distributed throughout the cable plant (or cable system), inclusiveof each amplifier location may permit the band-split to be configureddynamically as signaled by the CMTS. Selected from one of manydifferent, e.g. previously determined and/or specified, configurations,the band-split may be assigned per fiber node span or plant/system wide.The allotment may be shifted from majority DS to majority US or any mixin-between. In some embodiments, every device visible on a node span mayfollow the same band-split configuration. The intent may be to addressshifts in real-time bandwidth demand, shifting the allotment of US vs DSspectrum as a function of time of day, day of the week, holidayschedule, in response to inclement weather, emergency circumstance,pandemic or some other special event.

Additional Functional Features in a Flexible Diplexer Arrangement

Given a DSP base, additional facilities and functions may be readilyaccessible to incorporate anywhere along the cable plant or system.Furthermore, any unused resources may remain dark, e.g. powered-down,reserved for future use. It should also be noted that at least twodifferent types of DSP may be distinguished for discussions of DSP asrelating to the various embodiments disclosed herein. A first type ofDSP may encompass performing conventional analog signal conditioning(e.g. equalization, tilt adjustment, regeneration and band splits),while a second, much more complex type of DSP may encompass, amongothers, the process of receiving noise and US or DS broadband signalswith known formats, decoding the signal to bits, applying errorcorrection to remove received bit errors, optionally performing add/dropon sub-channels, and regenerating a refreshed broadband signal totransmit further US or DS.

Examples of additional functionality include:

-   -   Functionality enabled by Intermediate Signal Conditioning:        -   Equalization and tilt regeneration (at each amplifier site)            at points along the cable segment for improved signal            fidelity; and        -   Self-interference cancellation (at amplifier sites as well            as CM and RPD endpoints) to permit reduced guard bands            between US and DS if not FDX itself (which has thus far been            prohibited for “Node+N” plant deployments);    -   Functionality enabled by Secondary and Tertiary Band-Splits:        -   Virtual Segmentation (VS) of the cable plant through the use            of repeaters to create a high-speed transport between            dedicated endpoints utilizing the frequency range above the            designated US/DS bands; and        -   Auxiliary service points (from a given amplifier site)            providing access to/from a small cell base station or Wi-Fi            access point or other backhaul facilities.            The above features are further described below.

Intermediate Signal Conditioning

As mentioned above, a DSP-backed design may be further extended toprovide signal conditioning to mitigate adverse effects due to thechannel itself, as well as to component drift/aging. First, signalconditioning with no explicit knowledge of the underlying symbolstructure and pilot schedule may be considered. US/DS signal fidelitymay be enhanced by re-equalizing the signal at intermediate amplifierlocations. An OFDM symbol represents a form of data encapsulation. Thefrequency domain symbol contents at any receiver amplifier in thenetwork reflect the original data set impaired by the channel responseencountered since the preceding transmit amplifier. Provided theassigned cyclic prefix (CP) is longer than the channel delay spread,then the channel response from amplifier-to-amplifier may be compensatedby a single tap equalizer per subcarrier, further described below.Methods of self-interference cancellation may be added to improvedynamic signal range or otherwise extend the tolerable span fromamplifier-to-amplifier, thereby minimizing plant investment, especiallygiven the need to account for additional signal attenuation in coax athigher frequencies, as operational needs push beyond 3 or 5 GHz.Additional digital signal processing at existing amplifier sites mayhelp counteract the increasing loss of signal fidelity due to addedattenuation at higher frequencies.

Re-Equalization and Signal Tilt—

A more complex approach capable of demodulating to bits with knowledgeof the underlying symbol structure and pilot schedule may further beconsidered. Thus, provided knowledge of the US/DS schedule, i.e.sub-channel BWs, subcarrier (SC) allocation, pilot schedule andassociated reference signals (RS), the data-bearing SCs may bere-equalized subsequent to: digital downconversion (DDC) applied persub-channel, Cyclic Prefix (CP) removal, and Fourier Transform (FFT)using frequency domain techniques (which are generally included in atypical receiver design.) The DS tilt may additionally be reappliedwhile processing in the frequency domain. The signal may be returned tothe time domain via inverse Fourier Transform (IFFT). The CP and windowtaper may be restored as applicable, followed by digital up conversion(DUC) applied per sub-channel as depicted in FIG. 9. As shown in FIG. 9,RS is representative of reference signals particular to the OFDM signal.Symbol Sync is for time-aligning the Fourier Transforms to the sampledsymbols. The Fourier Transforms (FFT and IFFT) may use complex math onthe complex samples. The RF ADC produces In-phase and Quadrature(complex) samples at a set of time points {tIi,tQi}. The time points maybe generated in the digital circuits (HyperX) and may be time-wiseuniform or optionally non-uniform—for additional self-interferencesuppression. It should be noted that desynchronized interference maygenerally appear as random noise to the main signal processing.

Self-Interference

Replacing the fixed analog diplex filters with digital processing maygive rise to the potential of the transmit signal, traveling in onedirection, coupling to the receive signal, traveling in the oppositedirection. This coupling may manifest as unwanted self-interference dueto sidelobe energy attributed to intermodulation distortion at theamplifier output entering the cable plant unfiltered in the form ofadjacent leakage interference (ALI). The disparity in signal levels asseen at the amplifier inputs and their corresponding outputs mayadditionally give rise to unwanted adjacent channel interference (ACI)as the FWD (DS) transmitter output is coupled/reflected back to the REV(US) receive path. Likewise, the REV (US) transmitter output may becoupled/reflected back to the FWD (DS) receive path. The above mentionedeffects are illustrated in FIG. 10, the ALI and ACI indicated inrespective shaded areas.

Self-Interference Scenarios—

The DS/US self-interference scenarios are further illustrated throughthe simplified exemplary system diagram in FIG. 11. The DS TX signalfrom a Fiber Node (FN) may couple back to the corresponding US RX in theFN according to the channel impulse response, h₀₀. In a similar fashion,the US TX from a cable modem has the potential to couple to its own oran adjacent DS RX according to the channel impulse response, h₁₁.However, with the introduction of FDX, DOCSIS defines a sounding methodused to identify groups of cable modems, called Interference Groups,which would interfere with each other if they were allowed to transmitand receive at the same time in a given subband. TX/RX opportunities ina given subband are scheduled such that TX and RX opportunities do notoverlap among CMs belonging to the same interference group. Thisconsideration largely confines the SIC problem to the FN, given theavailability of a separate mechanism to mitigate the problem on the CMside. Referring to FIG. 12, an understanding of the DS echo response maybe drawn by examining the distribution of taps in a given plantconfiguration (illustrated in FIG. 12) where each tap represents apotential echo source given the likelihood of an impedance mismatch atthe tap location. The distribution of taps seen in the DS directionresults in a train of echoes spaced proportionally to the roundtripdelay from the FN to each tap location. Plots of the time domain impulseresponse (h₁₁) and the corresponding frequency domain channel responseare shown in FIG. 12.

Harmful self-interference effects may be mitigated via a mix of analogand digital techniques employed in a configurable FDD or FDX amplifier.The principal goal with Active Interference Cancellation (AIC) is tosuppress the interfering signal to a level that may be passed linearlyby the analog to digital converter (ADC). Given the HyperX Processor ora similar architecture, analog cancellation may be accomplished bypassing a complementary signal (i.e., a signal that is 180° out of phasewith the interfering signal) via an auxiliary transmitter. Provided to acombiner at the RX input, this cancellation signal removes theinterfering DS signal energy, thereby suppressing its impact on dataconversion and subsequent digital processing. Any residual echo may bemitigated by a secondary, purely digital echo cancellation stage. FIG.13 provides a simplified circuit diagram of an AIC-equipped flexiblediplexer both in an FDD and an FDX deployment configuration. It shouldbe noted that the FDD and FDX deployment configurations aredistinguished only by the presence/absence of variability in the DSfacing high-pass filters 1302 and 1304, respectively. In the FDD case,the HPF cutoff frequency is made variable (indicated as 258 to 602) toenable a variety of band-splits. In the FDX case, the HPF cutoff remainsfixed (indicated as 108) to enable differing band overlaps by varyingthe cutoff frequency in the US facing low-pass filter (LFP) 1306. It iswell known that that ADCs have a finite dynamic range, therefore theanalog cancellation is performed to reduce the interference to obtainthe desired signals in the range of the ADC. The digital interferencecancellation may then eliminate the residual interference.

The HyperX processor contributes uniquely given the mix of configurableprocessing elements (PEs) embedded in an array of data memory androuting (DMRs). Multiple PEs may be assigned as needed to estimate theecho response, mostly as part of the analog EC stage, and optionally aspart of any residual digital EC invoking DMRs as needed to support thePE processing. The PE resources may also serve in convolving the DS TXsignal with the estimated echo response to feed the AIC signal output,again with DMR support as needed. Digital echo cancellation may involvesimilar convolution and signal combining steps between the DS TX and USRX signals.

The DMRs may play an added role as a delay line feeding the auxiliaryAIC signal according to the response determined during channelestimation. As illustrated in Table 2, the DMR memories providesufficient time resolution to define the echo response correspondinginterference bandwidths approaching 600 MHz with as little as a 1.15 GHzprocessor clock. Combined with appropriate analog and mixed signalcomponents, e.g. ADCs and DACs, the HyperX processor may play a role ina self-interference cancellation solution that may be configured toaccommodate a variety of band-splits/band-sets and signal bandwidths.

TABLE 2 AIC Delay Line Requirements Required Delay Line Spacing UpstreamDownstream Echo min FDX fl fh fl fh BW Resolu- clk Bandset (MHz) (MHz)(MHz) (MHz) (MHz) tion (ns) (GHz) 1 85 204 108 1794  96 5.21 0.19 2 85300 108 1794 192 2.60 0.38 3 85 396 108 1794 288 1.74 0.58 4 85 492 1081794 384 1.30 0.77 5 85 684 108 1794 576 0.87 1.15

Virtual Segmentation

VS of the cable plant (or system) may be accomplished via a secondaryband-split, followed by a tertiary split to separate the VS US and VSDS, as depicted in FIG. 14.

Secondary Band-Split—

Positioned above the prescribed DOCSIS upper band edge, e.g. 1 GHz, 1.2GHz or 1.8 GHz, Virtual Segmentation (VS) provides a dedicated transportfrom the Fiber Node (FN) to the RPD with limited additional fiberoutlay. Implemented as an overlay service, VS is invisible to underlyingbroadcast and cable modem service operation. VS acts as a repeater,bypassing the amplifier and instead regenerating the signal seen on aninput port before multiplexing again with the amplified DOCSIS output.An example of spectrum allocation with VS is illustrated in FIG. 15. Thesecondary band-split separates the DOCSIS signal (bottom signal pathfrom the DOCSIS/VS split) from the virtual segment signal (upper signalpath from the DOCSIS/VS split), with the tertiary split in the uppersignal path separating the US and DS portions for the respectiverepeaters. The required signal processing may be as modest as thatdescribed to re-equalize the signal at intermediate points and rangingupward in complexity to that needed to demodulate and decode the VSsub-channels back to user bits, then re-encode and re-modulate.

Auxiliary Service Points—

If demodulated to bits, one or all of the VS sub-channel streams may bedirected to another access network, e.g., to Wi-Fi or 3GPP, formingauxiliary service access points. The auxiliary service points mayfurther lend themselves to an SDR implementation. Deployed as neededalong the cable strand, the needs of a Wi-Fi Access Point, Small-CellBase Station, Low-Power Broadcast Transmitter, and/or BackhaulTransceiver may be accommodated alongside VS transmit/receive (TX/RX)digital signal processing, with the added flexibility to adapt theaccess protocol to changing traffic demands as well as advances in tothe underlying standards specification, e.g. Wi-Fi 6, 3GPP 5G NR, ATSC3.x. A simplified system diagram of an exemplary cable systemimplemented with virtual segmentation is illustrated in FIG. 16. Each VSrepeater station may include flexible diplexers implemented according tothe various embodiments described herein.

Inline Network Processing

Demodulating to bits at intermediate service points may enable thepotential for inline, real-time network processing. Examples of inlinenetwork processing accessible at intermediate service points mightinclude:

-   -   Multi-layer, multi-service switching and routing, between as        well as within defined service access points;    -   Security—firewall, VPN identification, policy enforcement and        statistics gathering, encryption, etc.;    -   Classification—access control, filters, billing, etc.; and    -   Packet editing—fragmentation, replication, mirroring, address        translation, robust header compression, etc.

One aim with an SDR approach is to enable an ongoing progression in DSPcapability. An SDR approach may provide adequate processing throughputfor a range of deployment scenarios, ongoing upper band extensions,increased signal fidelity (especially in light of higher frequency use),ongoing evolution in prescribed band-splits, and ESDhalf-duplex/full-duplex capabilities. A DSP-backed amplifier provides aflexible design approach enabling Hardware as a Service (HaaS) with thepossibility of remote updates based on an incremental fee schedule withrolling feature deployment. HaaS may be enabled by overprovisioning theDSP complex. Periodic maintenance charges may be applied to ensure earlyaccess to the latest features, e.g. bandwidth extension, intermediatere-equalization, and/or self-interference cancellation.

Potential Benefits of DSP-Backed SDR-Based Diplexer Designs

Embodiments of DSP-backed amplifiers with flexible diplexers asdisclosed herein may provide diverse system benefits to HFC networkoperators, for example as outlined below.

Flexible Diplex Arrangement:

Introduces signal processing at amplifier locations to vary theband-split on command from the CMTS or some other centralized entity:

-   -   Permits multiple band-split configurations, as agreed upon via        the DOC SIS standardization process.    -   Additionally, permits a rendering of FDX band allocations, also        prescribed by the standard.    -   The chosen band-split may be confined to a node span, varying        RPD-by-RPD or signaled throughput the cable plant. Any        accessible RPDs and CMs will be instructed to follow suit.

Given a flexible band-split arrangement, future configurations areenabled through use of revised filter coefficient sets at each DSPbacked amplifier site.

-   -   Additional band-splits may be defined after the initial        standards release.    -   The guard bands between US and DS allocations can be varied        beyond initial standards release.

Dynamically Configurable Band-Split

Given a DSP backed plant configuration, the band-split may be configureddynamically to account for shifts in usage patterns as a function of use(real-time) load demands, time of day, day of the week, scheduledholiday, inclement weather condition, emergency circumstance, pandemicor other special events or circumstances.

The shift in bandwidth allocation may be signaled per node span fromeach RPD or globally from a common CMTS.

The allotment of US vs DS bandwidth may be varied from majority DS tomajority US, to predominantly DS with minimal US (or vice-versa), or anymix in between.

The proportion of bandwidth allotted for FDX can be varied, again basedon throughput demand.

Self-Interference Cancellation—

Given the disparity in signal levels at amplifier inputs and outputs,ACI may be mitigated through additional (or added) signal processing.Given the potential for sidelobe energy passing unfiltered due tointermodulation distortion at the amplifier output, ALI may be mitigatedthrough additional (added) signal processing.

Intermediate Signal Conditioning

Given DSP-backed amplifiers, some level of signal conditioning may beintroduced at intermediate points, leveraging the data encapsulationafforded by the OFDM symbol representation to improve downstream signalfidelity as the signal is passed amplifier-to-amplifier.

Examples of such signal conditioning include:

-   -   Re-equalization: Given the bandwidth allocation, signal        dimensions (e.g. FFT size, CP and roll-off lengths), and pilot        schedule, the channel response encountered from the previous        transmitter may be estimated, equalized on a per symbol basis,        the equalized pilots re-inserted, the CP reapplied and rolled        off, then passed on to the output amplifier.    -   Self-interference cancellation: given the disparity in signal        levels at amplifier inputs and output, signal processing may be        added to mitigate ACI. Given the potential for sidelobe energy        passing unfiltered due to intermodulation distortion at the        amplifier output, signal processing may be added to mitigate        ALI.    -   Active tradeoff a tradeoff between the level of DSP deployed per        amplifier site and the need for additional amplifiers to achieve        a desired span and range in extended signal bandwidth, e.g. 3        GHz or 5 GHz becomes possible. Signal processing may thus be        used to improve signal fidelity and extend the band support to 3        GHz or 5 GHz without the need for additional amplifiers or        closer separation between amplifiers.

Virtual Segmentation

Secondary Band-Split

-   -   Introduction of a secondary configurable filter pair to separate        a proprietary VS transport from the standard DOCSIS US/DS.        Tuning of the filter coefficients to accommodate a range in DOC        SIS upper band edge. Passing the VS signal        amplifier-to-amplifier, perhaps separate from the DOCSIS US/DS.    -   Introduction of a third filter pair to separate VS US from DS.        Tuning the filter coefficients according to the VS US/DS        bandwidth allocations.

Repeater—

A full signal repeater, implemented in both the US and DS directions asapplicable, may be added to extend the improvements gained withintermediate signal conditioning described above. Beyondre-equalization, the repeater may also be responsible fordemodulating/decoding the OFDM symbol contents to user data bits, thenre-encoding/re-modulating the signal to ensure no error propagatesbetween amplifiers. The need for this level of reconditioning may bebalanced against the DSP capability costs or power consumption as fulldemodulation/decoding represents a substantially larger computationalload than re-equalization alone.

Auxiliary Service Points

-   -   Additional signal processing may be introduced at select        amplifier locations to demodulate and decode/re-encode and        re-modulate the VS transport to and/or from user bits. Those        bits may be directed to and/or from an auxiliary access network,        e.g. Wi-Fi, 5G small cell, ATSC low power transmitter.    -   Update of the underlying auxiliary service protocol becomes        possible, given an SDR platform.

Scalable Processing Resources

Provisioning of an overabundance of processing resources, capable ofsatisfying an upper band in DSP throughput capability, to enableHardware as a Service (HaaS).

Possibility of ongoing design evolution, invoking resources as needed toaccommodate added features, for example those listed below in order ofcomplexity:

-   -   Reconfigurable diplex filtering;    -   Intermediate re-equalization and tilt;    -   Self-interference cancellation;    -   Extended bandwidth;    -   Virtual Segmentation; and/or    -   Virtual Segmentation with Auxiliary Service Points.

Although specific embodiments have been described above, theseembodiments are not intended to limit the scope of the presentdisclosure, even where only a single embodiment is described withrespect to a particular feature. Although the embodiments above havebeen described in considerable detail, numerous variations andmodifications will become apparent to those skilled in the art once theabove disclosure is fully appreciated. It is intended that the followingclaims be interpreted to embrace all such variations and modifications.

Examples of features provided in the disclosure are intended to beillustrative rather than restrictive unless stated otherwise. The abovedescription is intended to cover such alternatives, modifications, andequivalents as would be apparent to a person skilled in the art havingthe benefit of this disclosure.

The scope of the present disclosure includes any feature or combinationof features disclosed herein (either explicitly or implicitly), or anygeneralization thereof, whether or not it mitigates any or all of theproblems addressed herein. Accordingly, new claims may be formulatedduring prosecution of this application (or an application claimingpriority thereto) to any such combination of features. In particular,with reference to the appended claims, features from dependent claimsmay be combined with those of the independent claims and features fromrespective independent claims may be combined in any appropriate mannerand not merely in the specific combinations enumerated in the appendedclaims.

1. A dynamically configurable diplexer, the diplexer comprising: anupstream input port and an upstream output port configured for upstreamcommunications over a cable network; a downstream input port and adownstream output port configured for downstream communications over thecable network; and a pair of digital filters comprising a first digitalfilter coupling the upstream input port to the upstream output port anda second digital filter coupling the downstream input port to thedownstream output port, wherein the pair of digital filters isprogrammably configurable to allocate a first portion of a totalbandwidth of signals passing through the diplexer to the upstreamcommunications and allocate a second portion of the total bandwidth tothe downstream communications.
 2. The diplexer of claim 1, wherein thefirst digital filter is a digital low-pass filter and the second digitalfilter is a digital high-pass filter.
 3. The diplexer of claim 1,wherein the pair of digital filters are configured to operate accordingto a programmably configured set of filter coefficients.
 4. The diplexerof claim 3, wherein the programmably configured set of filtercoefficients is retrieved from memory.
 5. The diplexer of claim 1,further comprising: a first analog-to-digital converter (ADC) configuredconvert an analog upstream signal received at the upstream input port toa corresponding digital upstream signal and provide the digital upstreamsignal to the first digital filter; a second ADC configured convert aanalog downstream signal received at the downstream input port to acorresponding digital downstream signal and provide the digitaldownstream signal to the second digital filter; a firstdigital-to-analog converter (DAC) configured to convert a filtereddigital upstream signal received from the first digital filter to acorresponding analog upstream signal and provide the analog upstreamsignal to the upstream output port; and a second DAC configured toconvert a filtered digital downstream signal received from the seconddigital filter to a corresponding analog downstream signal and providethe analog downstream signal to the downstream output port.
 6. Thediplexer of claim 1, further comprising: a first amplifier configured toamplify an upstream signal of the upstream communications and providethe amplified upstream signal to the upstream output port; and a secondamplifier configured to amplify a downstream signal of the downstreamcommunications and provide the amplified downstream signal to thedownstream output port.
 7. The diplexer of claim 1, further comprising:control circuitry configured to perform operations comprising one ormore of: equalization and tilt regeneration; self-interferencecancellation; or signal reconditioning.
 8. The diplexer of claim 7,wherein the control circuit comprises: an analog echo cancellation stageconfigured to mitigate interfering downstream signal energy to suppressan impact of the interfering downstream signal energy on data conversionand/or on subsequent digital processing.
 9. The diplexer of claim 8,wherein the control circuit further comprises: a digital echocancellation stage configured to mitigate residual interferingdownstream signal energy that remains following mitigation performed bythe analog echo cancellation stage.
 10. A network node stationcomprising: a bidirectional port for upstream and downstreamcommunications; and a diplexer comprising: an upstream input port and anupstream output port configured for upstream communications via thebidirectional port; a downstream input port and a downstream output portconfigured for downstream communications via the bidirectional port; anda pair of digital filters comprising a first digital filter coupling theupstream input port to the upstream output port and a second digitalfilter coupling the downstream input port to the downstream output port,wherein the pair of digital filters is programmably configurable toallocate a first portion of a total bandwidth of signals passing throughthe diplexer to the upstream communications and allocate a secondportion of the total bandwidth to the downstream communications.
 11. Thenetwork node station of claim 10, wherein the pair of digital filtersare configured to operate according to a programmably configured set offilter coefficients.
 12. The network node station of claim 11, whereinthe programmably configured set of filter coefficients is retrieved frommemory.
 13. The network node station of claim 10, further comprising: afirst analog-to-digital converter (ADC) configured convert an analogupstream signal received at the upstream input port to a correspondingdigital upstream signal and provide the digital upstream signal to thefirst digital filter; a second ADC configured convert a analogdownstream signal received at the downstream input port to acorresponding digital downstream signal and provide the digitaldownstream signal to the second digital filter; a firstdigital-to-analog converter (DAC) configured to convert a filtereddigital upstream signal received from the first digital filter to acorresponding analog upstream signal and provide the analog upstreamsignal to the upstream output port; and a second DAC configured toconvert a filtered digital downstream signal received from the seconddigital filter to a corresponding analog downstream signal and providethe analog downstream signal to the downstream output port.
 14. Thenetwork node station of claim 10, further comprising: a first amplifierconfigured to amplify an upstream signal of the upstream communicationsand provide the amplified upstream signal to the upstream output port;and a second amplifier configured to amplify a downstream signal of thedownstream communications and provide the amplified downstream signal tothe downstream output port.
 15. The network node station of claim 10,further comprising: control circuitry configured to perform operationscomprising one or more of: equalization and tilt regeneration;self-interference cancellation; or signal reconditioning.
 16. Thenetwork node station of claim 15, wherein the control circuit comprises:an analog echo cancellation stage configured to mitigate interferingdownstream signal energy to suppress an impact of the interferingdownstream signal energy on data conversion and/or on subsequent digitalprocessing.
 17. The network node station of claim 16, wherein thecontrol circuit further comprises: a digital echo cancellation stageconfigured to mitigate residual interfering downstream signal energythat remains following mitigation performed by the analog echocancellation stage.
 18. A wired communication device, comprising: anon-transitory computer-readable memory medium; one or more processorscommunicatively coupled to the non-transitory computer-readable memorymedium; and a diplexer configured to facilitate upstream and downstreamcommunications of the wired communication device, the diplexercomprising: an upstream input port and an upstream output portconfigured for the upstream communications; a downstream input port anda downstream output port configured for the downstream communications;and a pair of digital filters comprising a first digital filter couplingthe upstream input port to the upstream output port and a second digitalfilter coupling the downstream input port to the downstream output port,wherein the pair of digital filters is programmably configurable toallocate a first portion of a total bandwidth of signals passing throughthe diplexer to the upstream communications and allocate a secondportion of the total bandwidth to the downstream communications.
 19. Thewired communication device of claim 18, wherein the diplexer furthercomprises: an analog echo cancellation stage configured to mitigateinterfering downstream signal energy to suppress an impact of theinterfering downstream signal energy on data conversion and/or onsubsequent digital processing.
 20. The wired communication device ofclaim 19, wherein the diplexer further comprises: a digital echocancellation stage configured to mitigate residual interferingdownstream signal energy that remains following mitigation performed bythe analog echo cancellation stage.